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Synapse supports pure digital and mixed-signal ASIC designs from concept to tapeout. To help reduce risk and associated design costs, Synapse offers comprehensive design flows and state-of-the-art infrastructure to meet the increasing demands of your market. Our deep domain expertise and distributed tools and flows, guarantee we bring best-in-class methods, resources, and results to the project.
- Architectural tradeoff studies, system partitioning and implementation
- Micro-architecture and specification development
- Memory subsystem design
- Digital/Analog/Mixed-signal custom design
- RTL coding (Verilog, VHDL, Verilog -AMS), simulation and verification
- SOC Block level and top level integration
- Synthesis & Timing Analysis
- Power reduction methodology
- Package Design – electrical and thermal design
- Device bring up/ testing and validation
- Process technology nodes: 20nm, 28nm, 40nm, 65nm, 90nm, 130nm
- Low power – architecture and block level custom circuit design
- High-performance – pipeline design and I/Os > 2.5GHz+
- Multiple clock domains – > 70
- High-speed Interfaces: SERDES (10G serial, XAUI, PCIe), PCI-Express, USB 2.0 + 3.0, Thunderbolt
- SAS, ATA/SATA and Fiber Channel
- Mixed-Signal IPs: PLL, ADC, DAC, Power Management Unit
- High-performance Memory Sub-Systems – DDR2/DDR3 Memory controllers, Flash controller
- Networking, Routing, Switching, Ethernet, 802.x, Cellular/Baseband, Tablets, Data Storage, Graphics, Video
- All major CPU, GPU, and DSP architectures including multi-core ARM/custom architectures
- Package performance and thermal analysis
- Magma
- Synopsys
- Cadence
- Mentor
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