DFT

Synapse Design’s global staff has vast knowledge of the most current Design For Test (DFT) techniques and tools. We help our Customers attain high coverage to reduce overall test cost, achieving some of the highest coverage on the most complex devices in the industry.

Design Services:

• Architectural analysis for testability/manufacturability tradeoffs
• Full/ partial scan insertion
• Memory BIST controller design
• OTP BIST controller design
• Logic BIST controller design
• ATPG with compression
• Boundary Scan (JTAG) implementation
• Tester vector generation
• Yield Analysis

Areas of Expertise:

• Memory/Logic BIST 
• Memory repair architecture
• Boundary Scan, Full/Partial Scan, Scan Compression
• ATPG fault coverage

Primary Tools:

• Mentor: DFT Advisor, FastScan, MBISTArchitect, TestKompress, BSDArchitect
• Synopsys : DFT-Max, TetraMax, XDBIST
• Logic Vision : MemBist IC, LBIST, JTAG/BSCAN
• Syntest : Turbo Check, Scan, MBist, & TurboBSD
• Proprietary : LSI, TI, Samsung, Fujitsu, NEC, IBM
• Simulators:
• VCS
• ModelSim/QuestaSim
• Incisive/ NC verilog